1. Field of the Invention
This invention relates to a direct-conversion receiver for a digital-modulation radio signal such as a frequency shift keyed (FSK) signal.
2. Description of the Prior Art
Paging systems of a mobile radio communications network are used for one-way signaling to small receivers (pagers) carried out by individuals. This paging function can signal an individual selectively to take some prearranged action, e.g., call the office, or can deliver a short message. In some of paging systems, a transmitter of a base station can communicate with pagers via digital-modulation radio signals such as frequency shift keyed (FSK) signals.
Direct-conversion receivers can be used as pagers containing FSK demodulators. According to some of the signal transmission standards for a paging system, a base station periodically transmits a digital-modulation radio signal a predetermined number of times, for example, three times. Thus, a pager generally receives a digital-modulation signal the predetermined number of times. The pager selects and uses only one of the first received signal to the last received signal, and disregards the other signals.
U.S. Pat. No. 5,402,449 discloses sample and hold circuits which periodically sample I and Q signals in response to a system clock outputted from a clock signal generator. In U.S. Pat. No. 5,402,449, the sample and hold circuits are successively followed by analog-to-digital converters, a ROM, and a decoder. The decoder includes a latch for periodically sampling and holding a decoding result in response to a data clock. U.S. Pat. No. 5,402,449 does not disclose deciding a logic state of the decoding result at a timing determined by a clock signal which is delayed from a center-symbol clock signal by a specified time. U.S. Pat. No. 5,402,449 does not disclose deciding a logic state of the decoding result at a timing which depends on a frequency error between a local oscillator signal and a received signal.
U.S. Pat. No. 5,086,437 discloses a frequency detector for demodulating a pair of I and Q signals into a digital baseband signal. The frequency detector is followed by a digital data detector which generates a data signal from the digital baseband signal. U.S. Pat. No. 5,086,437 does not disclose deciding a logic state of the data signal (the detection result) at a timing determined by a clock signal which is delayed from a center-symbol clock signal by a specified time. U.S. Pat. No. 5,086,437 does not disclose deciding a logic state of the data signal (the detection result) at a timing which depends on a frequency error between a local oscillator signal and a received signal.